Switching voltage regulators such as DC-DC regulators are widely used in modern electronic systems for a variety of applications such as computing (server and mobile) and POLs (Point-of-Load Systems) for telecommunications because of their high efficiency and small amount of area/volume consumed by such converters. Widely accepted switching voltage regulator topologies include buck, boost, buck-boost, forward, flyback, half-bridge, full-bridge, and SEPIC topologies. Multiphase buck converters are particularly well suited for providing high current at low voltages needed by high-performance integrated circuits such as microprocessors, graphics processors, and network processors. Buck converters are implemented with active components such as a pulse width modulation (PWM) controller IC (integrated circuit), driver circuitry, one or more phases including power MOSFETs (metal-oxide-semiconductor field-effect transistors), and passive components such as inductors, transformers or coupled inductors, capacitors, and resistors. Multiple phases (power stages) can be connected in parallel to the load through respective inductors to meet high output current requirements.
Some switching voltage regulators implement AVP (adaptive voltage position, also referred to as droop compensation and load line). In an AVP-based voltage regulator system, a key criteria for the voltage regulator design is to meet the output impedance requirement over frequency in order to achieve good transient response. The regulator controller can include a compensator designed to flatten the output impedance response in order to obtain a constant resistive output impedance. As long as the output impedance is constant within the control bandwidth and the impedance beyond the bandwidth is smaller than that, AVP can still be achieved. Under these conditions, the phase margin is typically larger than 60 degrees. Otherwise, a peak or bump occurs in the output impedance curve. Conventional AVP design methodologies set the control bandwidth to match the ESR (equivalent series resistance) zero and ensure that the impedance beyond the ESR zero is less than the droop resistance. However, a phase margin of at least 60 degrees cannot always be obtained e.g. when the regulator controller implements a very low switching frequency to achieve greater efficiency. A significant peak or bump arises in the output impedance response of the regulator under these conditions using conventional AVP design methodologies. Output impedance is an effective measure for evaluating the load transient response of a switching voltage regulator. A relatively flat output impedance curve yields a more ideal regulator response. Hence, peaks or bumps in the closed-loop impedance curve are undesirable and may lead to a less than ideal regulator response.